Variable size character raster display

ABSTRACT

Apparatus for providing a raster display of static data. A plurality of static data characters, for example in binary coded decimal form, is passed, a character at a time, by a parallel to serial converter to a read-only memory which converts each character into 20 eight-bit scan lines and transfers one scan line at a time to a video signal generator. The signal generator applies each bit to a raster display output device. The high cyclic rate results in the simultaneous display of all the static data characters. If desired, the display size, color, or intensity can be varied or the display can be caused to blink or flash, all on a display line by display line basis.

United States Patent [151 3,659,283 Ophir [451 Apr. 25, 1972 [54] VARIABLE SIZE CHARACTER RASTER [72] lnventor: David Ophlr, East Patchogue, NY.

[73] Assignee: Applied Digital Data Systems, Inc.

[22] Filed: May 9, 1969 [21] Appl. No.: 823,406

[52] US. Cl. ..340/324 A, 315/19 [51] Int. Cl ..G06f 3/14 [58] Field of Search ..340/324.1, 324 A [56] References Cited UNITED STATES PATENTS 3,471,743 10/1969 Olsson et a1 ..340/324 A X 3,345,458 10/1967 Cole et a1 340/324 X 3,346,853 10/1967 Koster et al.. 340/324 X 3,388,391 6/1968 Clark ..340/324 3,500,470 3/1970 Barker et a1.; ..340/324 COUNTER SCAN LINE NO. 159

DISPLAY E 4 CONTROL Primary Examiner-David L. Trafton Attorney-Morton, Bernard, Brown, Roberts & Sutherland, John W. Behringer, James N. Dresser, Eugene L. Bernard, W. Brown Morton, Jr., John T. Roberts, Martin J. Brown and Malcolm L. Sutherland [57] ABSTRACT Apparatus for providing a raster display of static data. A plurality of static data characters. for example in binary coded decimal form, is passed, a character at a time, by a parallel to serial converter to a read-only memory which converts each character into 20 eight-bit scan lines and transfers one scan line at a time to a video signal generator. The signal generator applies each bit to a raster display output device. The high cyclic rate results in the simultaneous display of all the static data characters. If desired, the display size, color, or intensity can be varied or the display can be caused to blink or flash, all on a display line by display line basis. I

5 Claims, 3 Drawing SCAN LINE COUNTER LINE COUNTER MULTIPLEXER READ ONLY

MEMORY COMMERCIAL TELEVISION RECEIV E R VIDEO SIGNAL GENERATOR .PATEmEmPnzs 1912 I 3,659,283

DAVID OPHIR ATTORNEYS In numerous situations, substantially static data is obtained,

and it is desired to display this data. By way of'example, it is frequently desired to display the contents of various registers within a large-scale digital computer system during system check-out or trouble shooting. Likewise, in other applications two-state data is frequently available which it is desirable to display. Thus, for example, a security system at a remote facility might be instrumented to provide a two-state, safe-unsafe indication. Frequently it is desired to display such data simultaneously at a large number of locations, for example to different layers of supervisory personnel. Some of the desired display locations might be remote from the data sources, either due to the nature of the organization or due to such considerations as security.

Presently available data display systems are capable of the instantaneous display of data available in two-state or binary coded decimal form. Such presently available data display systems have numerous shortcomings, however. Display tubes, such as so-called NIXIE tubes, generally are capable of displaying only one character at any one time, and so if a large number of characters are to be displayed, an equally large number of display tubes is required. The relatively high cost of such display tubes prohibits the display of large quantities of data. Even with that data which is displayed, the display is limited because any one display tube is capable of displaying only a limited number of characters. Thus, most display tubes are capable only of displaying either the numerals or 10 preselected letters. This limit the variety of data which can be displayed by any one display tube. Generally, available display tubes offer only a standard selection of available characters.

Consequently, if the display of an unusual character is desired, either it is not possible with presently existing display tubes, or a special display tube must be constructed for the purpose.

With presently existing data display devices, a separate connection is required to the data source for each data character to be displayed. Consequently, the display of a large number of characters requires an equally large number of connections. As a consequence, it is virtually impossible to place the display at a location remote from the data source. Even if one display is remotely located, the wiring required makes it impossible to provide plural displays in different locations.

In addition, presently available display devices, when in operation, are always displaying a digit. Therefore, leading zeros cannot be eliminated. This results in some difficulty and confusion -in reading multidigit numbers having several lead in g zeros. Furthermore, these presently available display devices are unable to provide special features suchas blinking of characters which if done might attract attention to data indicating unusual conditions. Likewise, the displays provided by presently available devices are fixed, not only in color but also in intensity and in character size.

While display devices have recently been developed in which the electrical signals representing the data are fed to multipin cathode ray tubes (CRT) which then ,display the data, such devices have not overcome many of the shortcomings of data display tubes. Thus, for example, such CRT display devices are limited in the variety and in the quantity of characters they can display.

The present invention is a data display system overcoming these several problems. The data display system of the present invention is capable of simultaneously displaying a large number of data characters in a plurality of remotely located, separated areas, and is capable of displaying a large variety of characters. Consequently, the cost per character is low. Only a single coaxial connection is required between the character generating portion and the output display device of this data display system. Therefore, the output display device can be situated at a location quite remote from the data sources, and,

if desired, numerous output display devices can be utilized simultaneously, each in a different location. If desired, the

data display characters can be transmitted as television signals and received by commercial television receivers at a plurality of remote locations. The data display system of the present invention can additionally provide on a display line by display line basis such features as blinking of characters to attract attention to significant data, alternation of color to provide either white characters on a black background or black characters on white background, variation in intensity of the 'white background or characters, and variation in character size to provide a more prominent display of significant data.

'In the data display system of the present invention, a plurality of data characters are fed to a serializer which receivers character-identifying instructions from an address generator and in response thereto transmits one data character at a time I to a readonly memory (ROM). The ROM provides 20 eightbit scan line signals for each data character. These eight-bit scan line signals are sent to a character generator which converts them into the necessary signals for application via a single coaxial cable to one or more television receivers or other output display devices which may be separately remotely located. The character size can be varied. The display might be either white-on-black or black-on-white, and in either case, the intensity of the white can be varied. Data can be made to blink so as to attract attention to data indicating unusual conditions, and leading zeros can be blanked out.

These and other aspects and advantages of the present invention are apparent from the following detailed description and claims, particularly when read in conjunction with the accompanying drawings in which like parts bear like reference numerals. In the drawings:

FIG. 1 is a block diagram of the data display system of the present invention;

FIG. 2 depicts typical output display characters which can be provided by the data display system of thepresent invention; and

FIG. 3 illustrates the output display provided by the system of the present invention.

The data display system of FIG. 1' is capable of displaying up to 160 data characters simultaneously on a data display device such as a commercially available television receiver. These 160 data characters are presented in 10 display lines of 16 characters each. Each display line includes 20 horizontal scan lines.

Clock 20, which by way of example might include a crystal controlled oscillator and the necessary dividing circuits, provides a pulse. output on line 22 at for example 400 kilohertz (KHz). This 400-KH2 output is applied to character counter 24, display line counter 26 and scan line counter 28. Character counter 24 keeps count of which of the 16 character positions on a given display line a character is to be displayed at, while display line counter 26 keeps track of which of the 10 display lines that character is to be displayed at, and scan line counter counts the 20 scan lines of each display line.

The character number and display line number signals are applied by their respective counters to multiplexer 30. These signals might be binary coded signals, and if so would each require four lines for transmission.

In the data display system depicted in FIG. I, multiplexer 30 receives a plurality of binary coded decimal (BCD) data signals representing the data characters which are to be displayed. Thus, for example, multiplexer 30 might receive 160 BCD input data characters, each on a group of four input lines giving a total of 640 input data lines. In FIG. 1, the input line groups for this example of data characters are designated 0,1,2 159 to correspond to the designations of the 160 input data characters. Utilizing the character number and display line number signals received from counters 24 and 26,

multiplexer 30 selects the proper input data character for application to read-only memory ROM 32. In the data display system of FIG. 1, in which each of the 160 data characters is received via four input data lines, multiplexer 30 mightinclude, by way of example, four identical AND gate matrices,

each having 16 columns and 10 rows of AND gates. Each AND gate in a particular matrix receives one input data line, one character number input, and one display line number input. As character counter 24 and display line counter 26 operate, one gate in each of the four matrices is enabled, and so the corresponding BCD input data character is applied by multiplexer 30 to ROM 32 via the four lines 34.

FIG. 2A depicts the output display of the data character 0. As can be seen, the illustrative data character, and every such illustrative data character, is made up of 13 eight-bit scan lines. If it be considered that a binary one is presented when a bit position is energized and that a binary zero is presented when a bit position is not energized, then during display of the data character 0, as depicted in FIG. 2A, the eight-bit positions of scan line are 0,0,1, 1 ,l,l,0,0. Likewise, the bit positions of scan line 1 are 0,l,0,0,0,0,l,0, while the bit positions of scan lines 2-10 are l,0,0,0,0,0,0, l. The bit positions of scan line 11 are O,l,0,0,0,0,l,0, and those of scan line 12 are 0,0,l,l,l,l,0,0. As has been stated, 20 scan lines make up each display line. Scan lines 13-19 are blank to provide the necessary vertical spacing between adjacent lines of data. Thus, all the bit positions for scan lines 13-19 are 0. F 1G. 2 depicts in a similar manner the output displays for several other typical data characters.

. ROM 32 receives the scan line number from scan line counter 28 and the input data character from multiplexer 30,

and in response to these, ROM 32 transmits via the eight connections 36 to video signal generator 38, the eight bits forming that scan line for the designated data character. Thus, if the desired data character is a 0, during scan line 0 ROM 32 transmits via the eight connections 36 to video signal generator 38 the eight bits 0,0,l,l,l,l,0,0. ROM 32 might be any suitable read only memory capable of translating the 20 scan lines of the 160 data characters into the necessary eight binary bits. Thus, for example, ROM 32 might be a woven braid magnetic core memory, or it might be an integrated circuit memory device such as a four phase MTOS, 2048-bit read-only memory manufactured by Microelectronics Division, General instrument Corp., Hicksville, New York.

Video signal generator 38 receives the eight data bits via line 36 and receives the character number, display line number, and scan line number from counters 24, 26 and 28. The character number is applied to a horizontal synchronization generator, while the character number, display line number and the scan line number are applied to a vertical synchronization generator. The eight data bits which are received in parallel from ROM 32 pass through a parallel-toserial converter from which they are applied one bit at a time to a two state signal generator, the output of which is applied with the outputs of the two synchronization generators to appropriate mixing circuitry to provide the desired composite video output signal which contains vertical synchronization information, horizontal synchronization information, and the two-state signal information. This composite video output signal is applied by cable 40 to output display device 42 which by way of example might be any commercially available television receiver. Cable 40 is preferably a coaxial cable with an impedance of 75 ohms.

FIG. 3 illustrates the output display provided by means of the data display system of the present invention and utilizing as an output display device a commercial television receiver,

The system operates with such a receiver in a non-interlaced mode and so there are 240 scan lines available. To insure against lossof data characters on the output display, the 20 uppermost and the 20 lowermost scan lines are left blank, and so 200 usable scan lines are available. In the illustrative example of FIG. 3, each scan line is made up of 160 points or data bits. Each of the 16 data characters which might be provided on a display line thus has points or data bits. Since each character provided by the system utilizes only eight bits, the remaining two bits provide the necessary horizontal spacing between characters. Of course, any convenient number of points could be provided in each scan line in accordance with the present invention. It is desirable that about percent of the points available per character be utilized for the horizontal intercharacter spacing.

FIG. 3 illustrates the various sizes in which data might be displayed. Thus, in display line 0, the uppennost display line, the data display A927 is presented, which might represent any received data. Since only four data characters are presented, the remaining 12 characters of display line 0 are not energized and thus remain blank. This is possible by having ROM provideall binary zeros for those data characters in response to an indication from multiplexer 30 that a blank is intended, as distinguished from a leading zero.

Displays such as that illustrated in FIG. 3 are generated scan line by scan line. Thus, display line 0 is generated one scan line at a time with binary zeros for all the data bits for the first 12 data characters, followed by the appropriate pattern of data bits to form scan line 0 of the data character A as depicted in FIG. 2F. This is followed by the appropriate patterns of data bits to form scan line 0 of the data characters 9, 2, and 7, as shown in FIG. 2E, 2C, and 2D, respectively. The system then flies back to the first bit of scan line 1 of data character 0. This scan line is then displayed. Each data bit for the first 12 characters is a binary zero, and then the patterns for scan line 1 of the characters A, 9, 2, and 7 are presented, as depicted in FIG. 2. Each succeeding scan line is likewise presented. The application of each data bit is triggered by pulses from clock 20. The output of clock 20 is applied to video signal generator 38 to pump the data bits through that device. Character counter 24 counts the clock pulses and changes the character number every 10 pulses (eight data bits and two space bits). Scan line counter 28 likewise counts the clock pulses and changes the scan line number every pulses. Likewise, display line counter 26 counts the clock pulses and changes the display line number every 3,200 pulses. As previously described, the character number and the display line number are applied to multiplexer 30 to gate the proper input data character to ROM 32, while the scan line number is applied to ROM 32 to cause passage therefrom of the proper data bit pattern for the particular data character received by ROM 32 from multiplexer 30. The character number, the display line number and the scan line number are applied to video signal generator 38 to cause generation of the appropriate vertical and horizontal synchronization signals. Preferably the appropriate gates within the four matrices in multiplexer 30 are enabled, as previously described, and then the data character is passed through these gates by the application of a pulse delayed in time from the clock pulses to insure that each gate has stabilized prior to activation. For this purpose the clock pulses are applied in multiplexer 30 to an appropriate delay device such as a delay multivibrator. A similar technique can be utilized within video signal generator 38, if desired, to insure generation of the appropriate binary data bit.

Output display device 42 is capable of displaying 160 data characters in 10 display lines of 16 data characters each. To give emphasis to particular data, several variations in the display are possible on a display line by display line basis. By way of examples, the character size can be doubled or quadrupled, a display line can be caused to blink to draw attention to it, a display line can be displayed as black characters on a white background rather than white characters on 'a black background, and the intensity of the white, either characters or background, can be changed. To accomplish these, a set of five control lines is provided to multiplexer 30 for each of the possible 10 display lines. FIG. 1 depicts one set of these control lines: one color control line to enable selection of white on black or black on white displays, one intensity control line to enable variation of the white intensity, one blink control line to enabling the blinking of a data line, a size 2 control line to enable the doubling of the size of the characters, and a size 4 control line to enable the quadrupling of the size of the characters. Similar sets of these five control lines are'provided for each display line.

As display line counter 26 enables each of the AND gates within multiplexer 30 associated with a particular display line, it also enables AND gates associated with the five control lines for that display line. If a control signal is present on one or more of these control lines, the control signal is passed to the output control lines from multiplexer 30. If neither a size 2 nor a size 4 signal is present, then size 1 characters are generated. if both a size 2 and a size 4 signal are present, the size 4 signal overrides the size 2 signal, and a size 4 output control signal is provided from multiplexer 30. a

As multiplexer 30 commences the passage of a display line, the five control line inputs are monitored, and if a control signal is present on any one of them, a switching circuit such as a flip-flop is set and remains set for the remainderof that display line to provide the output control signals from multiplexer 30. v

' The output display device might display display lines of characters of size 1 as depicted in display line 0 of FIG. 3. Each line of that size might contain up ,to 16 characters. If some data is of greater significance than other data, then that more significant data might be displayed in larger characters. To double each dimension of the data characters of a given display line, the size 2 input control line to multiplexer 30 is energized. As a result, a size 2 control signal is applied from H multiplexer 30 to clock 20, character counter 24, display line counter 26, and scan line counter 28. In response to this signal, character counter 24 is preset to 8 so that only the characters number 8 through number of any display line are displayed. The frequency of clock is cut in half so that each binary bit from video signal generator 38 lasts twice as long and thus has twice as great a horizontal deflection on the display screen of output display device 42. Scan line counter 28 counts every other clock pulse so that each scan line is repeated twice, thereby resulting in each line having twice the vertical deflection on the display screen of output display device 42. Alternatively, scan line counter 28 counts twice as many pulses before changing the scan line number. Display line counter 26 likewise counts every other clock pulse, and after counting 3,200 pulses adds two to the display line number. Alternatively, display line counter 26 counts 6,400 pulses before changing its display line number and then adds two to that number. As a result, as depicted by the display at display lines 1 and 2 in FIG. 3, the output display is doubled in horizontal size and in vertical size, and the vertical interline spacing is doubled.

ln like manner, to give an output display four times as large, both horizontally and vertically, as that in display lineO of FIG. 3, a signal is applied on the size 4 input control line to multiplexer 30. As a result, a size 4 control signal is applied from multiplexer 30 to clock 20, character counter 24, display line counter 26, and scan line counter 28. In response to this signal, character counter 24 is preset to 12 so that only the characters number l2 through number 15 of any display line are displayed. The frequency of clock 20 is cut to one-fourth its original value so that each binary bit from video signal generator 38 lasts four times as long as originally and thus has four times as great a horizontal deflection as originally on the display screen of output display device 42. Scan line counter 28 either counts every fourth clock pulse or counts four times as many pulses before changing its scan line number. As a result, each scan line is repeated four times. Likewise, display line counter 26 either counts every fourth pulse or counts four times as many pulses, and then adds four to the display line number. Consequently, as depicted by the display at display lines 3 6 in FIG. 3, the output display is four times as great in horizontal size and in vertical size, and the vertical interline spacing beneath that line of data is four times as great.

Output display device 42 can display 10 lines of size 1 characters, or 10 character lines. Each size 2 character takes two character lines, and each size 4 character takes four character lines. Thus, the number of lines of data actually displayed on device 42 is determined by the size of the display lines, and any combination of display lines sizes totaling not more than 10 character lines might be displayed.

In like manner, if a color control signal, or intensity control signal or a blink control signal is applied to multiplexer 30 for a particular display line, when that display line is passed to ROM 32 the one or more control signals are passed to video signal generator 38. A color control signal sets a flip-flop within generator 38 to reverse the video output display for that display line so that black characters are shown on a white background. An intensity control signal reduces the intensity of the white display by reducing the signal applied for the white, whether the white be background or character. A blink control command causes the video signal generator for example to repeatedly skip eight frames and then transmit eight frames for that display line to cause the display line to blink on output display device 42.

Clock 20 has a basic frequency of 400 KHz. Multiplexer 30 is scanned 60 times per second to provide a 60 frame per second output from video signal generator 38 which is compatible with commercially available television receivers. The

remaining time is required for flyback and other control functrons.

Since only a single coaxial cable 40 is required to connect output display device 42 to the remainder of the apparatus, the output display device might be located at a considerable distance from the remainder of the equipment. Several output display devices, each in a different location, might be connected at the same time to video signal generator 38 by separate coaxial cables to provide output displays in a number of separated, remote locations. If desired, the output of video signal generator 38 could be applied to appropriate transmitter equipment and transmitted a considerable distance to one or more receivers having suitable antennae, thereby eliminating the necessity of connecting the receivers directly to generator 38. The input data sources might also be remotely and separately located and connected to multiplexer 30 by appropriate wiring.

The number of different data characters which can be provided is determined by ROM 32. The input data might be in BCD format or hexadecimal code format or any other suitable code. ROM 32 is designed to translate the received data format to the appropriate scan line bits. if a new character is desired, it is only necessary to provide the proper decodingtranslating circuitry in ROM 32. Thus, numbers, letters, and other desired symbols might be provided.

Multiplexer 30 has been described with reference to AND gate matrices. Other suitable multiplexing apparatus might be utilized. Thus, by way of examples, a plurality of electromechanical stepping switches, a series of shift registers, or any other parallel-to-serial converter apparatus might be utilized.

What is claimed is:

1. Apparatus for generating from a first plurality of coded input data character signals a television compatible composite video output signal for application to a television receiver to provide a visible display of a first plurality of data characters in a second plurality of data lines, each data line formed of a third plurality of scan lines, each scan line including a fourth plurality of data bits, said apparatus comprising:

a. clock means for generating clock pulses of a first frequenbnfirst counting means connected to said clock means and responsive to said clock pulses for counting scan lines and providing an indication thereof;

c. second counting means connected to said clock means and responsive to said clock pulses for counting display lines and providing an indication thereof;

d. third counting means connected to said clock means and responsive to said clock pulses for counting characters in each display line and providing an indication thereof;

e. gating means having an output and having a first plurality of inputs adapted for connection to a first plurality of data sources for receipt in parallel therefrom of a first plurality of coded input data characters, said gating means having further inputs connected to said second and third counting means and in response to display line number indications and character number indications sequentially providing said first plurality of coded input data character signals as a coded output data character signal;

. decoding means connected to said gating means and to said first counting means and responsive to said coded output data character signal and to scan line number indications for decoding said coded output data character signal into a fourth plurality of data bits representative of the indicated scan line of the output data character of said coded output data character signal;

. video signal generator means connected to said decoding h. first control means for causing said clock means to generate clock pulses at a second frequency less than said first frequency and, for causing said first and second counting means to change the scan line number and display line number less frequently, whereby the visible display is of increased size.

2. Apparatus as claimed in claim 1 further comprising television receiver means coupled to said video signal generator means and responsive to said television compatible composite video output signal for providing a visible display of at least some of said first plurality of data characters.

3. Apparatus as claimed in claim 1 in which said decoding means comprises a read-only memory.

4. Apparatus as claimed in claim 1 further comprising second control means for causing said video signal generator means to respond to said fourth plurality of data bits during only substantially one-half of the cycles of said multiplexer means on preselected ones of said data line number indicatrons.

5. Apparatus as claimed in claim 4 in which the means cycles 60 times per second.

multiplexer 

1. Apparatus for generating from a first plurality of coded input data character signals a television compatible composite video output signal for application to a television receiver to provide a visible display of a first plurality of data characters in a second plurality of data lines, each data line formed of a third plurality of scan lines, each scan line including a fourth plurality of data bits, said apparatus comprising: a. clock means for generating clock pulses of a first frequency; b. first counting means connected to said clock means and responsive to said clock pulses for counting scan lines and providing an indication thereof; c. second counting means connected to said clock means and responsive to said clock pulses for counting display lines and providing an indication thereof; d. third counting means connected to said clock means and responsive to said clock pulses for counting characters in each display line and providing an indication thereof; e. gating means having an output and having a first plurality of inputs adapted for connection to a first plurality of data sources for receipt in parallel therefrom of a first plurality of coded input data characters, said gating means having further inputs connected to said second and third counting means and in response to display line number indications and character number indications sequentially providing said first plurality of coded input data character signals as a coded output data chaRacter signal; f. decoding means connected to said gating means and to said first counting means and responsive to said coded output data character signal and to scan line number indications for decoding said coded output data character signal into a fourth plurality of data bits representative of the indicated scan line of the output data character of said coded output data character signal; g. video signal generator means connected to said decoding means and to said first, second and third counting means and in response to said fourth plurality of data bits and to scan line number indications, display line number indications, and character number indications generating as a television compatible composite video output signal the indicated scan line of the output data character of said coded output data character signal; and h. first control means for causing said clock means to generate clock pulses at a second frequency less than said first frequency and for causing said first and second counting means to change the scan line number and display line number less frequently, whereby the visible display is of increased size.
 2. Apparatus as claimed in claim 1 further comprising television receiver means coupled to said video signal generator means and responsive to said television compatible composite video output signal for providing a visible display of at least some of said first plurality of data characters.
 3. Apparatus as claimed in claim 1 in which said decoding means comprises a read-only memory.
 4. Apparatus as claimed in claim 1 further comprising second control means for causing said video signal generator means to respond to said fourth plurality of data bits during only substantially one-half of the cycles of said multiplexer means on preselected ones of said data line number indications.
 5. Apparatus as claimed in claim 4 in which the multiplexer means cycles 60 times per second. 